EZ80F91AZA50EG

Product Summary

The EZ80F91AZA50EG is an high-speed ASSP with a maximum clock speed of 50 MHz and single-cycle instruction fetch. The EZ80F91AZA50EG operates in Z80®-compatible addressing mode (64 KB) or full 24-bit addressing mode (16 MB). The rich peripheral set of the EZ80F91AZA50EG makes it suitable for a variety of applications, including industrial control, embedded communication, and point-of-sale terminals.

Parametrics

EZ80F91AZA50EG absolute maximum ratings: (1)Ambient temperature under bias (oC): –40 to +105 ℃; (2)Storage temperature (oC): –65 to +150℃; (3)Voltage on any pin with respect to VSS: –0.3 to +5.5 V ; (4)Voltage on VDD pin with respect to VSS: –0.3 to +3.6 V; (5)Total power dissipation: 830mW; (6)Maximum current out of VSS: 230 mA; (7)Maximum current into VDD: 230 mA; (8)Maximum current on input and/or inactive output pin: –15 to +15 μA; (9)Maximum output current from active output pin (except PORT A pins): –8 to +8 mA; (10)Maximum PORT A output SOURCE current from active output pin: +8 mA; (11)Maximum PORT A output SINK current from active output; (12)pin: +10 mA.

Features

EZ80F91AZA50EG features: (1)Single-cycle instruction fetch, high-performance, pipelined eZ80CPU core (referred as The CPU in this document); (2)10/100 BaseT ethernet media access controller with Media-Independent Interface (MII); (3)256 KB Flash memory; (4)16 KB SRAM (8 KB user and 8 KB Ethernet); (5)Low-power features including SLEEP mode, HALT mode, and selective peripheral power-down control; (6)Two Universal Asynchronous Receiver/Transmitter (UART) with independent Baud Rate Generators (BRG); (7)Serial Peripheral Interface (SPI) with independent clock rate generator; (8)I2C with independent clock rate generator; (9)IrDA-compliant infrared encoder/decoder; (10)Glueless external peripheral interface with 4 Chip Selects, individual Wait State; (11)generators, an external WAIT input pin梥upports Z80-, Intel-, and Motorola-style buses; (12)Fixed-priority vectored interrupts (both internal and external) and interrupt controller; (13)Real-time clock with separate VDD pin for battery backup and selectable on-chip; (14)32 kHz oscillator or external 50/60 Hz input; (15)Four 16-bit Counter/Timers with prescalers and direct input/output drive.

Diagrams